A three-dimensional integrated circuit (3D IC) or a 3D chip package is manufactured by stacking silicon wafers or dies and interconnecting them vertically. The stacked dies act as a single device with an improved performance at a lower cost in terms of power consumption and physical footprint. This IP landscape report provides insights into currently active patents addressing the technologies and applications related to 3D integrated circuits and 3D chip packaging.
3D IC – Technology Landscape
February 23, 2020
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